The Sun SPARC RISC Model MCQ’s

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This set of Embedded System Multiple Choice Questions & Answers (MCQs) focuses on “The Sun SPARC RISC Model”.

1. How many external interrupts does SPARC processor support?
a) 5
b) 10
c) 15
d) 20

2. How many bits does SPARC have?
a) 8
b) 16
c) 32
d) 64

3. How many floating point register does the FPU of the SPARC have?
a) 16 128-bit
b) 32 128-bit
c) 64 128-bit
d) 10 128-bit

4. Which level is an in-built nonmaskable interrupt in SPARC processor?
a) 15
b) 14
c) 13
d) 12

5. What does SPARC stand for?
a) scalable processor architecture
b) speculating architecture
c) speculating processor
d) scaling Pentium architecture

6. What is generated by an external interrupt in SPARC?
a) internal trap
b) external trap
c) memory trap
d) interfaced trap

7. What are the three modules in the SPARC processor?
a) IU, FPU, CU
b) SP, DI, SI
c) AX, BX, CX
d) CU, CH, CL

8. What improves the context switching and parameter passing?
a) register windowing
b) large register
c) stack register
d) program counter

9. How many bits does SPARC-V9 processor have?
a) 16
b) 32
c) 64
d) 128

10. How many instructions does SPARC processor have?
a) 16
b) 32
c) 64
d) 128

11. When an external interrupt is generated, what type of mode does the processor supports?
a) real mode
b) virtual mode
c) protected mode
d) supervisor mode

12. Which company developed SPARC?
a) intel
b) IBM
c) Motorola
d) sun microsystem

13. Where is trap vector table located in SPARC processor?
a) program counter
b) Y register
c) status register
d) trap base register

14. Which module of SPARC contains the general purpose registers?
a) IU
b) FPU
c) CU
d) control unit

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