Synchronous BUS MCQ’s

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This set of Computer Architecture Multiple Choice Questions & Answers (MCQs) focuses on “Synchronous BUS”.

1. The classification of BUSes into synchronous and asynchronous is based on __________
a) The devices connected to them
b) The type of data transfer
c) The Timing of data transfers
d) None of the mentioned

2. The device which starts data transfer is called __________
a) Master
b) Transactor
c) Distributor
d) Initiator

3. The primary function of the BUS is __________
a) To connect the various devices to the cpu
b) To provide a path for communication between the processor and other devices
c) To facilitate data transfer between various devices
d) All of the mentioned

4. The device which interacts with the initiator is __________
a) Slave
b) Master
c) Responder
d) Friend

5. The delays caused in the switching of the timing signals is due to __________
a) Memory access time
b) WMFC
c) Propagation delay
d) Processor delay

6. The Master strobes the slave at the end of each clock cycle in Synchronous BUS.
a) True
b) False

7. In synchronous BUS, the devices get the timing signals from __________
a) Timing generator in the device
b) A common clock line
c) Timing signals are not used at all
d) None of the mentioned

8. The time for which the data is to be on the BUS is affected by __________
a) Propagation delay of the circuit
b) Setup time of the device
c) Memory access time
d) Propagation delay of the circuit & Setup time of the device

9. Which is fed into the BUS first by the initiator?
a) Data
b) Address
c) Commands or controls
d) Address, Commands or controls

10. _____________ signal is used as an acknowledgement signal by the slave in Multiple cycle transfers.
a) Ack signal
b) Slave ready signal
c) Master ready signal
d) Slave received signal

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