Size of Cache MCQ’s

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This set of Embedded System Multiple Choice Questions & Answers (MCQs) focuses on “Size of Cache”.

1. What is the disadvantage of a fully associative cache?
a) hardware
b) software
c) memory
d) peripherals

2. Which mapping of cache is inefficient in software viewpoint?
a) fully associative
b) 2 way associative
c) 16 way associative
d) direct mapping

3. Which address is used for a tag?
a) memory address
b) logical address
c) cache address
d) location address

4. Which of the following cache mapping can prevent bus thrashing?
a) fully associative
b) direct mapping
c) n way set associative
d) 2 way associative

5. Which of the following cache has a separate comparator for each entry?
a) direct mapped cache
b) fully associative cache
c) 2-way associative cache
d) 16-way associative cache

6. Which of the following approach uses more silicon area?
a) unified
b) harvard
c) logical
d) physical

7. In which of the following the data is preserved within the cache?
a) logical cache
b) physical cache
c) unified cache
d) harvard cache

8. How many comparators present in the direct mapping cache?
a) 3
b) 2
c) 1
d) 4

9. What type of cache is used in the Intel 80486DX?
a) logical
b) physical
c) harvard
d) unified

10. Which mechanism splits the external memory storage into memory pages?
a) index mechanism
b) burst mode
c) distributive mode
d) a software mechanism

11. What is the disadvantage of the physical address?
a) debugging
b) delay
c) data preservation
d) data cleared

12. Which type of cache is used the SPARC architecture?
a) unified
b) harvard
c) logical
d) physical

13. Which cache mapping have a sequential execution?
a) direct mapping
b) fully associative
c) n way set associative
d) burst fill

14. Which cache memory solve the cache coherency problem?
a) physical cache
b) logical cache
c) unified cache
d) harvard cache

15. Which of the following has a separate cache for the data and instructions?
a) unified
b) harvard
c) logical
d) physical

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