Paging MCQ’s

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This set of Microprocessor Multiple Choice Questions & Answers (MCQs) focuses on “Paging”.

1. The size of the pages in the paging scheme is
a) variable
b) fixed
c) both variable and fixed
d) none

2. To convert linear addresses into physical addresses, the mechanism that the paging unit uses is
a) linear conversion mechanism
b) one level table mechanism
c) physical conversion mechanism
d) two level table mechanism

3. The advantage of pages in paging is
a) no logical relation with program
b) no need of entire segment of task in physical memory
c) reduction of memory requirement for task
d) all of the mentioned

4. The control register that stores the 32-bit linear address, at which the previous page fault is detected is
a) CR0
b) CR1
c) CR2
d) CR3

5. The control register that is used as page directory physical base address register is
a) CR0
b) CR1
c) CR2
d) CR3

6. Each directory entry in page directory is maximum of
a) 2 bytes
b) 4 bytes
c) 8 bytes
d) 16 bytes

7. Which of the following is not a component of paging unit?
a) page directory
b) page descriptor base register
c) page table
d) page

8. The bits of CR3, that are always zero are
a) higher 4 bits
b) lower 8 bits
c) higher 10 bits
d) lower 12 bits

9. The size of each page table is of
a) 2 Kbytes
b) 2 bytes
c) 4 Kbytes
d) 4 bytes

10. The bit that is undefined for page directory entries is
a) P-bit
b) A-bit
c) D-bit
d) All of the mentioned

11. The storage of 32 recently accessed page table entries to optimize the time, is known as
a) page table
b) page descriptor base register
c) page table cache
d) none of the mentioned

12. The dirty bit(D) is set, before which operation is carried out
a) write
b) read
c) initialization
d) none of the mentioned

13. The bit that is used for providing protection is
a) User/Supervisor bit
b) Read bit
c) Write bit
d) all of the mentioned

14. The page table cache is also known as
a) page table storage
b) storage buffer
c) translation look aside buffer
d) all of the mentioned

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