Numeric Coprocessor – 80486DX MCQ’s

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This set of Microprocessor Multiple Choice Questions & Answers (MCQs) focuses on “Numeric Coprocessor – 80486DX”.

1. Which of the following signal is handled by bus control and request sequencer?
a) ADS#
b) PWT
c) RDY#
d) All of the mentioned

2. The unit that subjects the processor operation to boundary scan tests is
a) parity generation and control unit
b) prefetcher unit
c) boundary scan and control unit
d) segmentation unit

3. The first processor with an inbuilt floating point unit is
a) 80386
b) 80486
c) 80286
d) 8086

4. The management of the virtual memory of the system and adequate protection to data or codes in the physical memory is provided by
a) segmentation unit
b) paging unit
c) attribute PLA
d) all of the mentioned

5. The major limitation of 80386-387 system is
a) low speed
b) 80386 sends data using an I/O handshake technique
c) 80386 returns to real mode by reset operation
d) none of the mentioned

6. In Little Endian data format, the data is stored as
a) MSB is stored at lower memory address and LSB at higher memory address
b) LSB is stored at lower memory address and MSB at higher memory address
c) MSB is stored at general purpose registers
d) LSB is stored at general purpose registers

7. The flag that is added to 80486 in additional to the flags similar to 80386 is
a) alignment check flag
b) parity check flag
c) conditional flag
d) all of the mentioned

8. The datatype that the 80486 doesnot support is
a) Signed and unsigned
b) ASCII
c) Floating point
d) None

9. The on-chip cache is used for storing
a) addresses of data
b) opcodes and data
c) data and their addresses
d) opcodes and their addresses

10. The on-chip cache can be flushed using external hardware using
a) FLUSH pin
b) TERMINATE pin
c) FLOW pin
d) Pin FLUSH# or using software

11. The on-chip cache is controlled by
a) Cache disable(CD)
b) No write through(NW)
c) Cache disable and No write through
d) None of the mentioned

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