Netburst Microarchitecture For Pentium4 -2, Instruction Translation Lookaside Buffer (ITLB) and Branch Prediction MCQ’s

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This set of Microprocessor Multiple Choice Questions & Answers (MCQs) focuses on “Netburst Microarchitecture For Pentium4 -2, Instruction Translation Lookaside Buffer (ITLB) and Branch Prediction”.

1. Which of the following is a type of branch prediction?
a) static prediction
b) dynamic prediction
c) static and dynamic prediction
d) none

2. The prediction that is based on a statistical assumption that the majority of backward branches occur in repetitive loops is
a) static prediction
b) dynamic prediction
c) branch prediction
d) none

3. If the logical processors want to execute complex IA-32 instructions simultaneously then the number of microcode instruction pointers required is
a) 1
b) 2
c) 3
d) 4

4. The advantage of static prediction is
a) simple and fast
b) does not require table lookups or calculations
c) performs without much degradation
d) all of the mentioned

5. The unit that preserves the history of each conditional branch is
a) Branch Target Buffer (BTB)
b) Branch History Table (BHT)
c) Static prediction
d) Dynamic prediction

6. Each logical processor has
a) one 64-byte streaming buffer
b) one 32-byte streaming buffer
c) two 64-byte streaming buffers
d) two 32-byte streaming buffers

7. The dynamic branch prediction algorithms use
a) Branch History Table (BHT)
b) Branch Target Buffer (BTB)
c) Branch History Table and Branch Target Buffer
d) None

8. The BHT keeps a record that indicates the likelihood of the branches grouped as
a) strongly taken
b) taken
c) not taken
d) all of the mentioned

9. If there is a trace cache miss, then the instruction bytes are required to be fetched from the
a) instruction decoder
b) Level2 cache
c) execution module
d) none of the mentioned

10. The Instruction Translation Lookaside Buffer(ITLB) is present in
a) trace cache
b) instruction decoder
c) logical processors
d) all of the mentioned

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