Input Offset Voltage – 3 MCQ’s

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This set of Linear Integrated Circuits Multiple Choice Questions & Answers (MCQs) focuses on “Input Offset Voltage – 3″.

1. Where does the compensating network connected in an inverting amplifier.
a) Non-inverting input terminal
b) Inverting input terminal
c) Between non-inverting and output terminal
d) Between inverting and output terminal

2. Why closed loop differential amplifiers are difficult to null?
a) Due to compensating network
b) Due to feedback loop
c) Due to input offset voltage
d) None of the mentioned

3. Determine the voltage gain for the circuit.

Determine the voltage gain for the given circuit

a) 1.1
b) 1.6
c) 1.2
d) 2.2

4. How to achieve maximum CMRR in the given circuit?

Find the maximum CMRR from the given circuit

a) R1 = RF
b) RF = R3|| RC+ RB and R1= R2
c) R1= R2 and RF= R3+ RC
d) None of the mentioned

5. The offset voltage in the voltage follower is balanced using
a) Voltage drop across the load resistor
b) Voltage drop across feedback resistor
c) Compensating network connected to inverting input terminal
d) Compensating network connected to non- inverting input terminal

6. Compute the output voltage for voltage follower with offset voltage compensating network?

Compute the output voltage for the voltage follower with offset voltage compensating network

a) 3.6v
b) 10.8v
c) 26v
d) 33v

7. What is the advantage of compensated differential amplifier?
a) All of the mentioned
b) Slightly complex circuit
c) Does not affect CMRR
d) Balanced op-amp

8. Find the maximum possible output offset voltage, which is caused by the input offset voltage Vio=15mv?

Find the maximum possible output offset voltage, which is caused by the input offset voltage

a) 0.075v
b) 0.75v
c) 0.75v
d) 7.5v

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