Hybrid Architecture -RISC and CISC Convergence, Advantages of RISC, Design Issues of RISC Processors – 2 MCQ’s

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This set of Microprocessor Multiple Choice Questions & Answers (MCQs) focuses on “Hybrid Architecture -RISC and CISC Convergence, Advantages of RISC, Design Issues of RISC Processors – 2″.

1. Which of the following is not true about RISC processors?
a) addressing modes are less
b) pipelining is key for high speed
c) microcoding is required
d) single machine cycle instructions

2. The RISC processors that support variable length instructions are from
a) Intel
b) Motorola
c) AMD
d) Intel and Motorola

3. The number of CPIs(Clock Per Instruction) for an instruction of RISC processors is
a) 0
b) 1
c) 2
d) 3

4. Which of the following is true about register windowing?
a) chips expose 32 registers to programmer
b) puts demands on multiplexers
c) puts enormous demands on register ports
d) all of the mentioned

5. The register window is used to point the number of physical registers is
a) infinite
b) that are currently used
c) finite
d) that are unused

6. When an instruction depends on the results of the previous instructions then
a) error occurs
b) software fault occurs
c) data dependency occurs
d) hardware fault occurs

7. The disadvantage of register windowing is
a) high speed
b) puts demands on multiplexers/register ports
c) consumes less cycles
d) doesn’t handle overflow/underflow

8. Which of the following is not a stage of pipeline of a RISC processor?
a) read registers and decode the instructions
b) fetch instructions from registers
c) write result into a register
d) access an operand in data memory

9. The instructions that instruct the processor to make a decision about the next instruction to be executed are
a) data dependency instructions
b) branch instructions
c) control transfer instructions
d) none

10. The reason for which the RISC processor goes to idle state(or stall) is
a) delay in reading information from memory
b) poor instruction set design
c) dependencies between instructions
d) all of the mentioned

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