Features of Pentium 4, Netburst Microarchitecture For Pentium4 – 1 MCQ’s

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This set of Microprocessor Multiple Choice Questions & Answers (MCQs) focuses on “Features of Pentium 4, Netburst Microarchitecture For Pentium4 – 1″.

1. Which of the following is not a module of Pentium 4 architecture?
a) front end module
b) execution module
c) control module
d) none

2. The front module of Pentium 4 consists of
a) trace cache
b) microcode ROM
c) front end branch predictor
d) all of the mentioned

3. The feature of Pentium 4 is
a) works based on NetBurst microarchitecture
b) clock speed ranges from 1.4GHz to 1.7GHz
c) has hyper-pipelined technology
d) all of the mentioned

4. The unit that decodes the instructions concurrently and translate them into micro-operations is
a) trace cache
b) instruction decoder
c) execution module
d) front end branch predictor

5. The unit that does not store the instructions, but the decoded stream of instructions is
a) trace cache
b) front end branch predictor
c) microcode ROM
d) none

6. The unit that predicts the locations from where the next instruction bytes are fetched is
a) trace cache
b) front end branch predictor
c) execution module
d) instruction decoder

7. In complex instructions, when the instruction needs to be translated into more than 4 micro-operations, then the decoder transfers the task to
a) trace cache
b) front end branch predictor
c) microcode ROM
d) none

8. Trace cache can store the micro-ops upto a range of
a) 6 K decoded micro-ops
b) 8 K decoded micro-ops
c) 10 K decoded micro-ops
d) 12 K decoded micro-ops

9. If complex instructions like interrupt handling, string manipulation appear, then the control from trace cache transfers to
a) microcode ROM
b) front end branch predictor
c) execution module
d) instruction decoder

10. After the micro-ops are issued by the microcode ROM, the control goes to
a) trace cache
b) front end branch predictor
c) execution module
d) instruction decoder

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