Enhanced Instruction Set of Pentium, Intel MMX Architecture MCQ’s

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This set of Microprocessor Multiple Choice Questions & Answers (MCQs) focuses on “Enhanced Instruction Set of Pentium, Intel MMX Architecture”.

1. The transcendental instruction that supports computation of sine and cosine is
a) FCOSSIN
b) FSNE
c) FSINFCOS
d) FSINCOS

2. The instruction that computes tan(x) is
a) FTAN
b) FTNGNT
c) FPTAN
d) FXTAN

3. Which of the following is not a transcendental instruction?
a) FSIN
b) FCOS
c) FMUL
d) FPTAN

4. The instruction that computes arctan(x) is
a) FTAN
b) FACTN
c) FARCTAN
d) FPATAN

5. The instruction, FYL2XP, supports to compute the expression
a) Y*logX
b) Y*log2X
c) Y*log(2X+1)
d) Y*log2(X+1)

6. For floating point operations, the bits used by mantissa in a floating point register is
a) 32
b) 64
c) 72
d) 79

7. The instruction, F2XMI, is used to compute
a) 2X
b) 2X-1
c) 2X+1
d) 2X+2

8. The size of a general purpose floating point register of floating point unit is
a) 4 bytes
b) 40 bytes
c) 8 bytes
d) 80 bits

9. The multimedia applications mainly require the architecture of
a) single instruction stream single data stream
b) multiple instruction stream single data stream
c) single instruction stream multiple data stream
d) multiple instruction stream multiple data stream

10. After a sequence of MMX instructions is executed, the MMX registers should be cleared by an instruction,
a) CLEAR
b) RESET
c) EMM
d) EMMS

11. After executing the floating point instructions, the floating point registers should be cleared by an instruction,
a) CLEAR
b) EFPR
c) EMMF
d) EMMS

12. The size of each MMX (Multimedia Extension) register is
a) 32 bits
b) 64 bits
c) 128 bits
d) 256 bits

13. The number of pixels that can be manipulated in a single register by the CPU using MMX architecture is
a) 4
b) 6
c) 8
d) 10

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