Burst Interfaces MCQ’s

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This set of Embedded System Multiple Choice Questions & Answers (MCQs) focuses on “Burst Interfaces”.

1. How did burst interfaces access faster memory?
a) segmentation
b) dma
c) static column memory
d) memory

2. What type of timing is required for the burst interfaces?
a) synchronous
b) equal
c) unequal
d) symmetrical

3. Which of the following memory access can reduce the clock cycles?
a) bus interfacing
b) burst interfacing
c) dma
d) dram

4. In which memory does the burst interfaces act as a part of the cache?
a) DRAM
b) ROM
c) SRAM
d) Flash memory

5. Which of the following uses a linear line fill interfacing?
a) MC68040
b) MC68030
c) US 74707 B2
d) Hyper Bus

6. Which of the following include special address generation and data latches?
a) burst interface
b) peripheral interface
c) dma
d) input-output interfacing

7. In which of the following access, the address is supplied?
a) the first access
b) the second access
c) third access
d) fourth access

8. Which of the following protocol matches the MC68040?
a) MCM62486
b) US 5729504 A
c) HyperBus
d) MCM62940

9. Which of the following makes use of the burst fill technique?
a) burst interfaces
b) dma
c) peripheral interfaces
d) input-output interfaces

11. How many clocks are required for the first access in the burst interface?
a) 1
b) 2
c) 3
d) 4

12. Which of the following uses a wrap around burst interfacing?
a) MC68030
b) MC68040
c) HyperBus
d) US 5729504 A

13. How can gate delays be reduced?
a) synchronous memory
b) asynchronous memory
c) pseudo asynchronous memory
d) symmetrical memory

14. Which of the following protocol matches the Intel 80486?
a) MCM62940
b) MCM62486
c) US 74707 B2
d) Hyper Bus

11. Which of the following is a Motorola’s protocol product?
a) MCM62940
b) Avalon
c) Slave interfaces
d) AXI slave interfaces

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